Broadband Communications Systems and Architectures Research Group


CoreSim is an Internet-scale LISP deployment simulator with a hybrid event/trace based architecture and is able to replay a packet trace to simulate the behavior of an ITR and the associated mapping system. It builds its topology using Internet measurement data from the iPlane project and reports mapping lookup latency, the load imposed on each participating node, and ITR cache and packet buffer statistics. It was first presented to the academic community at the Trilogy Future Internet Summer School poster session (extended abstract, poster). CoreSim is written in Perl, and receved the most testing with Perl 5.10 on Linux 2.6, x86_64. You can download the latest development snapshot here. A technical report describing it is available here, and one that describes how we validated it here.

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